Awais Mehmood Kamboh

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Advanced VLSI Design
Course Code:	EE908		Semester:	3
Credit Hours:	3		Prerequisite Codes:
Instructor:	Dr. Awais M. Kamboh		Discipline:	DSP/Electronics
Office:	Room #311		Telephone:	+92 (0)51 9085 2119
Lecture Days:	Tuesday, Thursday		E-mail:	awais.kamboh@seecs.edu.pk
Class Room:	CR-2		Consulting Hours:	1000 to 1200 hrs or E-mail
Knowledge Group:		Digital Systems and Signal Processing	Updates on LMS:	Several times a week

Course Description:

The objective of this graduate level course is to introduce advanced concepts in VLSI design. The builds up on an undergraduate level introductory VLSI Design course. The topics covered in the course enable the students to analyze and design modern high performance/high speed, low power, low cost and highly reliable ASICs. Techniques for performance improvement are discussed with a focus on system reliability. Designing for low power, low voltage circuit operation is also presented. The effect of transistor scaling in modern processes is discussed.

Course Outcomes:

By the end of the course the students will be able to

· Use Cadence software to simulate and design ASICs

· Optimize different metrics for the designs

· Analyze and optimize timing and delay in systems

· Understand the limitations of low-power ASIC designs

· Study the effect of process variations on circuit performance

· Create layouts for fabrication of ASICs.

· Analyze, design and test memory structures.

Books:
Text Book:	Digital Integrated Circuits: A Design Perspective by Jan Rabaey, Anantha Chandrakasan &Borivoje Nikolic, 2^nd Edition, 2003, Prentice-Hall
Reference Books:	Principles of CMOS VLSI Design. N. Weste and D. Harris., 3rd Edition, 2005. Addison-Wesley

Main Topics to be Covered:
The course covers the following topics
	Scaling	Transistor Model
	Optimization for speed	Complex Gates
	Logical Effort	Adders
	Dynamic/Domino Logic	Memory
	Timing Concepts	Registers

Weightages:
Quizzes:	10%
Assignments:	20%
Midterm:	30%
End Semester Exam:	40%

Tools / Software Requirement:
	Cadence Virtuoso and Spectre. Some assignments may require Cadence NC-Verilog, RTL Compiler and Encounter.

Last Updated 14^th August 2014.